Programmable logic controller have been known and used for a number of years. However, they have traditionally been relegated to relatively simple and menial tasks when viewed in terms of the inherent potential inherent of what is basically a computer. Moreover, for cost purposes present day programmable logic controllers do not utilize state of the art microprocessors but generally utilize commonly known and available microprocessors. Accordingly, they are generally multi-purpose devices for fitting into a variety of situations, and which generally function well for their purpose.
As a result of this, existing programmable logic controllers (PLC) generally translate a users program into the native language of the host processor or sometimes interpret the users program directly. Some manufacturers have even incorporated existing microprocessors which have some boolean instructions included in their instruction set. However, the number of data elements that can be used with these types of existing processors is presently very limited.
It has been found that boolean instructions are a excellent way in which one can greatly increase the speed of a processor. Generally boolean processors break-up operations into a series of smaller elements with the thought that separate operations are more quickly implemented.
Given present day manufacturing economics, high-speed accurate machine control must be implemented and maintained in order to more accurately control process parameters. Such implementation is frequently vital to the success of the process operation from a manufacturing and economic viewpoint.
Some PLC users, in an effort to execute PLC instructions more quickly have resorted to several techniques for managing these speed limitations. These techniques include, but are not limited to dividing the PLC task into smaller tasks and programming these tasks into separate programmable logic controllers; using programmable logic controllers that incorporate some method of identifying critical tasks and executing them at a preset rate; or slowing down the control process to meet the requirements of existing machines.
Unfortunately, all these mentioned techniques require unacceptable compromises or inordinate amount of preplanning on the part of the PLC user. Moreover, the speed of the PLC is still generally unacceptable where high-speed processor and instruction requirements are required. By way of example, interpreting a users program limits the execution time of a PLC to 5-10 micro-seconds per boolean instruction. Reducing this time by translating the instruction into the native language of the host processor can only reduce this instruction speed to the 300-500 nanosecond range. Ultimately, existing programmable controller microprocessors with built-in boolean instructions can only achieve approximately 160 nano seconds per boolean instruction.
Accordingly, it is desirable, and an object of the present invention to produce a programmable logic controller which can operate on high-speed instructions.
it is yet another object and advantage of the present invention to produce a programmable logic controller which can produce execution times of less than 40 nanoseconds per instruction.
It is still another object of the present invention and it is advantageous to produce a programmable logic controller having a boolean co-processor which is still operable with the existing standard programmable logic controller microprocessors.
A still further object and advantage of the present invention is a high-speed programmable logic controller which does not require the user to divide up PLC tasks, or utilize additional programmable logic controllers or to identify critical tasks with the thought of separately handling them.
Yet another object of the present invention and advantage thereof is a programmable logic controller which does not require the control process to be slowed down in order to meet the speed and instruction execution requirements of existing programmable logic controllers.
A further object of the present invention and advantage thereof is a programmable logic controller which is relatively inexpensive to manufacture and implement.
Another object of the present invention is to produce a programmable logic controller, comprising a microprocessor operatively connected to a memory device, a boolean co-processor and an image RAM, wherein separate instruction and data buses are utilized, and wherein the boolean co-processor can inquire and fetch instruction separately from the microprocessor. Such a device is taught by the present invention.